formulasearchengine - User contributions [en]

FFAG accelerator

2014-07-21T09:19:08Z

131.169.37.129: /* Continuing development */ fixed typo. that section is confusing

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Self-phase modulation

2014-07-02T10:23:34Z

131.169.134.242: /* Theory */

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Differential nonlinearity

2014-01-31T10:26:57Z

131.169.212.195: /* Formula */

{{One source|date=March 2011}}
[[File:Linear Potential Sweep.JPG|right|400px|thumb|'''Linear potential sweep''']]
'''Linear sweep voltammetry''' is a [[Voltammetry|voltammetric method]] where the current at a [[working electrode]] is measured while the potential between the working electrode and a [[reference electrode]] is swept linearly in time. Oxidation or reduction of species is registered as a peak or trough in the current signal at the potential at which the species begins to be oxidized or reduced.

== Experimental method ==
The experimental setup for linear sweep voltammetry utilizes a potentiostat and a three-electrode setup to deliver a potential to a solution and monitor its change in current. The three-electrode setup consists of a working electrode, an auxiliary electrode, and a reference electrode. The potentiostat delivers the potentials through the three-electrode setup. A potential, E, is delivered through the working electrode. The slope of the potential vs. time graph is called the scan rate and can range from mV/s to 1,000,000 V/s.<ref>{{cite web|last=Tissue|first=Brian M.|title=Linear Sweep Voltammetry|website=CHP|url=http://www.files.chem.vt.edu/chem-ed/echem/linsweep.html}}</ref> At higher scan rates the current is found to increase which improves the signal to noise ratio. Therefore higher scan rates lead to better signal to noise ratios.

The working electrode is where the oxidation/reduction reactions occur. The equation below gives an example of an oxidation occurring at the surface of the working electrode. ES is the standard reduction potential of A. As E approaches ES the current on the surface increases and when E=ES then the concentration of [A] = [A-] at the surface.<ref>{{cite web|last=|first=|title=Voltammetry|website=CHP|url=http://mail.chiangmai.ac.th/~scijjkmn/voltammetry.htm}}</ref> As the molecules on the surface of the working electrode or oxidized/reduced they move away from the surface and new molecules come into contact with the surface of the working electrode. This flow of molecules to and from the working electrode causes the current.

<math>A+e^-=A^-</math> E_s=0.00V

Oxidation of molecule A at the surface of the working electrode

The auxiliary and reference electrode work in unison to balance out the charge added or removed by the working electrode. The auxiliary electrode balances the working electrode, but in order to know how much potential it has to add or remove it relies on the reference electrode. The reference electrode has a known reduction potential. The auxiliary electrode tries to keep the reference electrode at a certain reduction potential and to do this it has to balance the working electrode.<ref>{{cite book|last=Kounaves|first=Samuel P.|title=Voltammetric Techniques. Handbook of Instrumental Techniques for Analytical Chemistry|pages=709–725}}</ref>

== Characterization ==
Linear sweep voltammetry can identify unknown species and determine the concentration of solutions. E1/2 can be used to identify the unknown species while the height of the limiting current can determine the concentration. The sensitivity of current changes vs. voltage can be increased by increasing the scan rate. Higher potentials per second result in more oxidation/reduction of a species at the surface of the working electrode.

== Variations ==
For reversible reactions cyclic voltammetry can be used to find information about the forward reaction and the reverse reaction. Like linear sweep voltammetry, cyclic voltammetry applies a linear potential over time and at a certain potential the potentiostat will reverse the potential applied and sweep back to the beginning point. Cyclic voltammetry provides information about the oxidation and reduction reactions.

== Applications ==
While cyclic voltammetry is applicable to most cases where linear sweep voltammetry is used, there are some instances where linear sweep voltammetry is more useful. In cases where the reaction is irreversible cyclic voltammetry will not give any additional data that linear sweep voltammetry would give us.<ref>{{cite web|title=Instrumentation, Pine Research. Linear Sweep Voltammetry|year=2008|website=CHP|url=http://www.voltammetry.net/pine/aftermath/echem/linear_sweep_voltammetry.}}</ref>
In one example,<ref>{{cite paper|last=Cheng|first=Shaoan|last=Xing|first=Defeng|last=Call|first=Douglas F|last=Logan|first=Bruce E.|title=Direct Biological Conversion of Electrical Current into Methane by Electromethanogenesis|year=2009|journal=Environ. Sci. Technol.|pages=3953–3958.}}</ref> linear voltammetry was used to examine direct methane production via a biocathode. Since the production of methane from CO2 is an irreversible reaction, cyclic voltammetry did not present any distinct advantage over linear sweep voltammetry. This group found that the biocathode produced higher current densities than a plain carbon cathode and that methane can be produced from a direct electrical current without the need of hydrogen gas.

==See also==
* [[Cyclic voltammetry]]
* [[Electroanalytical Methods]]
* Linear Sweep Voltammetry/Cyclic Voltammetry. [Online] http://www.basinc.com/mans/EC_epsilon/Techniques/CycVolt/cv.html.
* webmaster@ceb.cam.ac.uk. Linear Sweep and Cyclic Voltametry: The Principles. Department of Chemical Engineering and Biotechnology, University of Cambridge. [Online] http://www.ceb.cam.ac.uk/pages/linear-sweep-and-cyclic-voltametry-the-principles.html.

==References==
{{Reflist}}

{{Electroanalytical}}

[[Category:Electroanalytical methods]]

Fano factor

2014-01-27T12:48:55Z

131.169.212.195:

In [[linear algebra]], an '''augmented matrix''' is a [[matrix (mathematics)|matrix]] obtained by appending the columns of two given matrices, usually for the purpose of performing the same [[elementary row operations]] on each of the given matrices.

Given the matrices ''A'' and ''B'', where

<math>
A =
\begin{bmatrix}
1 & 3 & 2 \\
2 & 0 & 1 \\
5 & 2 & 2
\end{bmatrix}
, \quad
B =
\begin{bmatrix}
4 \\
3 \\
1
\end{bmatrix},
</math>

the augmented matrix (''A''|''B'') is written as

<math>
(A|B)=
\left[\begin{array}{ccc|c}
1 & 3 & 2 & 4 \\
2 & 0 & 1 & 3 \\
5 & 2 & 2 & 1
\end{array}\right].
</math>

This is useful when solving [[system of linear equations|systems of linear equations]].

For a given number of unknowns, the number of solutions to a system of linear equations depends only on the rank of the matrix representing the system and the rank of the corresponding augmented matrix. Specifically, according to the [[Rouché–Capelli theorem]], any system of linear equations is [[System of linear equations#Consistency|inconsistent]] (has no solutions) if the [[rank (linear algebra)|rank]] of the augmented matrix is greater than the rank of the [[coefficient matrix]]; if, on the other hand, the ranks of these two matrices are equal, the system must have at least one solution. The solution is unique if and only if the rank equals the number of variables. Otherwise the general solution has ''k'' free parameters where ''k'' is the difference between the number of variables and the rank; hence in such a case there are an infinitude of solutions.

An augmented matrix may also be used to find the inverse of a matrix by combining it with the [[identity matrix]].

== Examples ==
===Matrix inverse===
Let ''C'' be the square 2×2 matrix
:<math>
C =
\begin{bmatrix}
1 & 3 \\
-5 & 0
\end{bmatrix}.
</math>

To find the inverse of C we create (''C''|''I'') where I is the 2×2 [[identity matrix]]. We then reduce the part of (''C''|''I'') corresponding to ''C'' to the identity matrix using only [[elementary row operations]] on (''C''|''I'').

:<math>
(C|I) =
\left[\begin{array}{cc|cc}
1 & 3 & 1 & 0\\
-5 & 0 & 0 & 1
\end{array}\right]
</math>

:<math>
(I|C^{-1}) =
\left[\begin{array}{cc|cc}
1 & 0 & 0 & -\frac{1}{5} \\
0 & 1 & \frac{1}{3} & \frac{1}{15}
\end{array}\right]
</math>,

the right part of which is the inverse of the original matrix.

===Existence and number of solutions===

Consider the system of equations

:''x'' + ''y'' + 2''z'' = 3
:''x'' + ''y'' + ''z'' = 1
:2''x'' + 2''y'' + 2''z'' = 2.

The coefficient matrix is

:<math>
A =
\begin{bmatrix}
1 & 1 & 2 \\
1 & 1 & 1 \\
2 & 2 & 2 \\
\end{bmatrix},
</math>

and the augmented matrix is

:<math>
(A|B) =
\left[\begin{array}{ccc|c}
1 & 1 & 2 & 3\\
1 & 1 & 1 & 1 \\
2 & 2 & 2 & 2
\end{array}\right].
</math>

Since both of these have the same rank, namely 2, there exists at least one solution; and since their rank is less than the number of unknowns, the latter being 3, there are an infinite number of solutions.

In contrast, consider the system

:''x'' + ''y'' + 2''z'' = 3
:''x'' + ''y'' + ''z'' = 1
:2''x'' + 2''y'' + 2''z'' = 5.

The coefficient matrix is

:<math>
A =
\begin{bmatrix}
1 & 1 & 2 \\
1 & 1 & 1 \\
2 & 2 & 2 \\
\end{bmatrix},
</math>

and the augmented matrix is

:<math>
(A|B) =
\left[\begin{array}{ccc|c}
1 & 1 & 2 & 3\\
1 & 1 & 1 & 1 \\
2 & 2 & 2 & 5
\end{array}\right].
</math>

In this example the coefficient matrix has rank 2 while the augmented matrix has rank 3; so this system of equations has no solution. Indeed, an increase in the number of linearly independent rows has made the system of equations '''inconsistent'''.

===Solution of a linear system===
As used in linear algebra, an augmented matrix is used to represent the [[coefficients]] and the [[solution vector]] of each equation set.
For the set of equations

:<math>
\begin{align}
x + 2y + 3z &= 0 \\
3x + 4y + 7z &= 2 \\
6x + 5y + 9z &= 11
\end{align}
</math>

the coefficients and constant terms give the matrices

:<math>
A =
\begin{bmatrix}
1 & 2 & 3 \\
3 & 4 & 7 \\
6 & 5 & 9
\end{bmatrix}
, \quad
B =
\begin{bmatrix}
0 \\
2 \\
11
\end{bmatrix},
</math>

and hence give the augmented matrix

:<math>
(A|B) =
\left[\begin{array}{ccc|c}
1 & 2 & 3 & 0 \\
3 & 4 & 7 & 2 \\
6 & 5 & 9 & 11
\end{array}\right]
</math>.

Note that the rank of the coefficient matrix, which is 3, equals the rank of the augmented matrix, so at least one solution exists; and since this rank equals the number of unknowns, there is exactly one solution.

To obtain the solution, row operations can be performed on the augmented matrix to obtain the identity matrix on the left side, yielding

:<math>
\left[\begin{array}{ccc|c}
1 & 0 & 0 & 4 \\
0 & 1 & 0 & 1 \\
0 & 0 & 1 & -2 \\
\end{array}\right],
</math>

so the solution of the system is (''x'', ''y'', ''z'') = (4, 1, -2).

==References==
* Marvin Marcus and Henryk Minc, ''A survey of matrix theory and matrix inequalities'', [[Dover Publications]], 1992, ISBN 0-486-67102-X. Page 31.

[[Category:Matrices]]

Weak hypercharge

2013-08-01T16:53:50Z

131.169.207.137: /* Definition */ Use T_3 in table heading to match formulation used in text

{{Use dmy dates|date=July 2013}}
{{More footnotes|date=October 2010}}
[[Image:Ic-photo-Intel--C8253.JPG|thumb|Intel C8253]]
[[Image:Intel 8253 and 8254.svg|thumb|{{nowrap|Programmable interval timer}} {{nowrap|Intel 8253}}. {{nowrap|Intel 8254}} has the same pinout.]]
The [[Intel]] '''8253''' and '''8254''' are [[Programmable Interval Timer]]s (PITs), which perform timing and counting functions. They were primarily designed for the [[Intel 8080]]/[[Intel 8085|8085]]-processors, but later used in x86-systems. They (or an equivalent circuit embedded in a larger chip) are found in all [[IBM PC compatible]]s.

== History ==
The 8253 was used in IBM PC compatibles since their introduction in 1981.<ref>{{cite web |url=http://www.microsoft.com/whdc/system/sysinternals/mm-timer.mspx |title=Guidelines For Providing Multimedia Timer Support |date=20 September 2002 |accessdate=2010-10-13}}</ref> In modern times, this PIT is not included as a separate chip in an x86 PC. Rather, its functionality is included as part of the motherboard's [[southbridge (computing)|southbridge]] chipset. In some modern chipsets, this change may show up as measurable timing differences in accessing a PIT using the [[x86]] [[I/O address]] space. Reads and writes to such a PIT's registers in the I/O address space may complete much faster.

Newer motherboards also include a counter through the [[Advanced Configuration and Power Interface]] (ACPI), a counter on the Local Advanced Programmable Interrupt Controller ([[Local APIC]]), and a [[High Precision Event Timer]]. The CPU itself also provides the [[Time Stamp Counter]] (TSC) facility.

== Features ==
[[Image:Intel 8253 block diagram.svg|thumb|Block diagram of {{nowrap|Intel 8253}}]]

The timer has three counters, called channels. Each channel can be programmed to operate in one of six modes. Once programmed, the channels can perform their tasks independently. The timer is usually assigned to [[Interrupt request|IRQ]]-0 (highest priority hardware interrupt) because of the critical function it performs and because so many devices depend on it.<ref>{{cite web|url=http://download.intel.com/design/archives/periphrl/docs/23124406.pdf|title= Intel 82c54 PIT Datasheet}}</ref>

=== Counters ===
There are 3 [[counters]] (or [[timer]]s), which are labeled as '''Counter 0''', '''Counter 1''' and '''Counter 2'''.<ref name="Intel 8254">{{cite web|title=8254/82C54: Introduction to Programmable Interval Timer|url=http://www.intel.com/design/archives/periphrl/docs/7203.htm?wapkw=8254|publisher=Intel Corporation|accessdate=21 August 2011}}</ref> Each counter has 2 input pins – '''CLK''' ([[clock]] input) and '''GATE''' – and 1-pin, '''OUT''', for data output. The 3 counters are 16-bit down counters independent of each other, and can be easily read by the [[Central processing unit|CPU]].<ref>{{cite web|title=MSM 82c53 Datasheet|url=http://www.sharpmz.org/download/8253.pdf}}</ref>

In the original IBM PCs, the first counter (selected by setting A1=A0=0, see '''Control Word Register''' below) is used to generate a [[clock signal|timekeeping]] interrupt. The second counter (A1=0, A0=1) is used to trigger the refresh of [[DRAM]] memory. The last counter (A1=1, A0=0) is used to generate tones via the [[PC speaker]].

Besides the counters, a typical Intel 8253 microchip also contains the following components:

=== Data/Bus Buffer ===
This block contains the logic to buffer the data bus to / from the microprocessor, and to the internal registers. It has 8 input pins, usually labelled as D7..D0, where D7 is the [[most significant bit|MSB]].

=== Read/Write Logic ===
The '''Read/Write Logic''' block has 5 pins, which are listed below. Notice that '''/X''' denotes an active low signal.

* '''/RD''': read signal
* '''/WR''': write signal
* '''/CS''': chip select signal
* '''A0''', '''A1''': address lines

Operation mode of the PIT is changed by setting the above hardware signals. For example, to write to the '''Control Word Register''', one needs to set /CS=0, /RD=1, /WR=0, A1=A0=1.

=== Control Word Register ===
Port 43h R/W 
Port 53h R/W – second chip ... 
 
This register contains the programmed information which will be sent (by the [[microprocessor]]) to the device. It defines how the PIT logically works. Each access to these ports takes about 1 µs.

To initialize the counters, the microprocessor must write a control word (CW) in this register. This can be done by setting proper values for the pins of the '''Read/Write Logic''' block and then by sending the control word to the '''Data/Bus Buffer''' block.

The control word register contains 8 bits, labeled D7..D0 (D7 is the [[most significant bit|MSB]]).
{| class="wikitable"
|-
! Bit#
! D7
! D6
! D5
! D4
! D3
! D2
! D1
! D0
! Short Description
|-
! Name
! SC1
! SC0
! RW1
! RW0
! M2
! M1
! M0
! BCD
!
|-
!
! 0
! 0
! x
! x
! x
! x
! x
! x
! Counter 0 at port 40h R/W
|-
!
! 0
! 1
! x
! x
! x
! x
! x
! x
! Counter 1 at port 41h R/W
|-
!
! 1
! 0
! x
! x
! x
! x
! x
! x
! Counter 2 at port 42h R/W
|-
!
!
!
!
!
!
!
!
!
!
|-
!
! x
! x
! 0
! 0
! x
! x
! x
! x
! Counter Latch, value can be read out in the way RW1, RW0 was set before. The value is held until it is read out or overwritten.
|-
!
! x
! x
! 0
! 1
! x
! x
! x
! x
! Read/Write bits 0..7 of counter value
|-
!
! x
! x
! 1
! 0
! x
! x
! x
! x
! Read/Write bits 8..15 of counter value
|-
!
! x
! x
! 1
! 1
! x
! x
! x
! x
! 2xRead/2xWrite bits 0..7 then 8..15 of counter value
|-
!
!
!
!
!
!
!
!
!
!
|-
!
! x
! x
! x
! x
! 0
! 0
! 0
! x
! Mode 0: Interrupt on Terminal Count
|-
!
! x
! x
! x
! x
! 0
! 0
! 1
! x
! Mode 1: Hardware Retriggerable One-Shot
|-
!
! x
! x
! x
! x
! 0
! 1
! 0
! x
! Mode 2: Rate Generator
|-
!
! x
! x
! x
! x
! 0
! 1
! 1
! x
! Mode 3: Square Wave
|-
!
! x
! x
! x
! x
! 1
! 0
! 0
! x
! Mode 4: Software Triggered Strobe
|-
!
! x
! x
! x
! x
! 1
! 0
! 1
! x
! Mode 5: Hardware Triggered Strobe (Retriggerable)
|-
!
!
!
!
!
!
!
!
!
!
|-
!
! x
! x
! x
! x
! x
! x
! x
! 0
! Counter is a 16 bit binary counter(0..65535,FFFFh)
|-
!
! x
! x
! x
! x
! x
! x
! x
! 1
! Counter is a 16 bit decimal counter 4 x 4bit decades(0..9999)
|-
!
!
!
!
!
!
!
!
!
!
|-
! Name
! 1
! 1
! _____
count
! _____
status
! C2
! C1
! C0
! 0
!
|-
!
! 1
! 1
! 0
! 1
! x
! x
! x
! 0
! Counter(C0..C2) value(s) can be read out.
|-
!
! 1
! 1
! 1
! 0
! x
! x
! x
! 0
! Counter's(C0..C2) state(s) can be read out.
see below Status Byte
|-
!
! 1
! 1
! 0
! 0
! x
! x
! x
! 0
! Counter's(C0..C2) value(s) and state(s) can be read out.
|}

When setting the PIT, the microprocessor first sends a control message, then a count message to the PIT. The counting process will start after the PIT has received these messages, and, in some cases, if it detects the rising [[signal edge|edge]] from the '''GATE''' input signal.

On PCs the address for timer0 (chip) is at port 40h..43h like described and the second timer1 (chip) is at 50h..53h.

=== Status Byte ===
8 bit 
The Status Byte is read like a 8 bit counter value (port 40h..42h R).
<pre>
Bit# D7 D6 D5 D4 D3 D2 D1 D0
Name output null RW1 RW0 M2 M1 M0 BCD
count
-------------------------------------------
0 x x x x x x x Out Pin is 0
1 x x x x x x x Out Pin is 1
-------------------------------------------
x 0 x x x x x x The value of the latch is loaded into the counter.
A new value can be written to the latch.
x 1 x x x x x x Counter value is 0.
-------------------------------------------
x x = = = = = = like defined in the Control Word Register

</pre>

== Operation Modes ==
The D3, D2, and D1 bits of the '''Control Word''' set the operating mode of the timer. There are 6 modes in total; for modes 2 and 3, the D3 bit is ignored, so the missing modes 6 and 7 are aliases for modes 2 and 3. Notice that, for modes 0, 2, 3 and 4, '''GATE''' must be set to '''HIGH''' to enable counting. For mode 5, the rising edge of '''GATE''' starts the count. For details on each mode, see the reference links.

=== Mode 0 (000): Interrupt on Terminal Count ===
Mode 0 is used for the generation of accurate time delay under software control. In this mode, the counter will start counting from the initial '''COUNT''' value loaded into it, down to 0. Counting rate is equal to the input clock frequency.

The '''OUT''' pin is set low after the '''Control Word''' is written, and counting starts one clock cycle after the '''COUNT''' programmed. '''OUT''' remains low until the counter reaches 0, at which point '''OUT''' will be set high until the counter is reloaded or the '''Control Word''' is written. The Gate signal should remain active high for normal counting. If Gate goes low counting get terminated and current count is latched till Gate pulse goes high again.

=== Mode 1 (001): Programmable One Shot ===
In this mode 8253 can be used as [[Monostable Multivibrator]]. '''GATE''' input is used as trigger input.

'''OUT''' will be initially high. '''OUT''' will go low on the '''CLK''' pulse following a trigger to begin the one-shot pulse, and will remain low until the Counter reaches zero. '''OUT''' will then go high and remain high until the '''CLK''' pulse after the next trigger.

After writing the Control Word and initial count, the Counter is armed. A trigger results in loading the Counter and setting '''OUT''' low on the next '''CLK''' pulse, thus starting the one-shot pulse. An initial count of '''N''' will result in a one-shot pulse '''N CLK''' cycles in duration.

The one-shot is retriggerable, hence '''OUT''' will remain low for '''N CLK''' pulses after any trigger. The one-shot pulse can be repeated without rewriting the same count into the counter. '''GATE''' has no effect on '''OUT'''. If a new count is written to the Counter during a oneshot pulse, the current one-shot is not affected unless the counter is retriggered. In that case, the Counter is loaded with the new count and the oneshot pulse continues until the new count expires.

=== Mode 2 (X10): Rate Generator ===
In this mode, the device acts as a divide-by-n counter, which is commonly used to generate a real-time clock interrupt.

Like other modes, counting process will start the next clock cycle after '''COUNT''' is sent. '''OUT''' will then remain high until the counter reaches 1, and will go low for one clock pulse. '''OUT''' will then go high again, and the whole process repeats itself.

The time between the high pulses depends on the preset count in the counter's register, and is calculated using the following formula:

Value to be loaded into counter = <math> {\it f_{input}} \over {\it f_{output}} </math>

Note that the values in the '''COUNT''' register range from <math>n</math> to 1; the register never reaches zero.

=== Mode 3 (X11): Square Wave Generator ===
This mode is similar to mode 2. However, the duration of the high and low clock pulses of the output will be different from mode 2.

Suppose '''n''' is the number loaded into the counter (the '''COUNT''' message), the output will be
* high for <math>n \over 2</math> counts, and low for <math>n \over 2</math> counts, if '''n''' is even.
* high for <math>n+1 \over 2</math> counts, and low for <math>n-1 \over 2</math> counts, if '''n''' is odd.

=== Mode 4 (100): Software Triggered Strobe ===
After '''Control Word''' and '''COUNT''' is loaded, the output will remain high until the counter reaches zero. The counter will then generate a low pulse for 1 clock cycle (a strobe) – after that the output will become high again.

=== Mode 5 (101): Hardware Triggered Strobe ===
This mode is similar to mode 4. However, the counting process is triggered by the '''GATE''' input.

After receiving the '''Control Word''' and '''COUNT''', the output will be set high. Once the device detects a rising edge on the '''GATE''' input, it will start counting. When the counter reaches 0, the output will go low for one clock cycle – after that it will become high again, to repeat the cycle on the next rising edge of '''GATE'''.

== Programming Considerations ==
On x86 PCs, many video card BIOS and system BIOS will reprogram the second counter for their own use. Reprogramming typically happens during video mode changes, when the video BIOS may be executed, and during system management mode and power saving state changes, when the system BIOS may be executed. This prevents any serious alternative uses of the timer's second counter on many x86 systems.

The timer that is used by the system on x86 PCs is Channel 0, and its clock ticks at a theoretical value of 1193181.8181... [[Hertz|Hz]], i.e. one third of the [[NTSC]] color [[subcarrier]] frequency, which comes from dividing the system clock (14.31818 MHz) by 12. This is a holdover of the very first [[Color Graphics Adapter|CGA]] PCs – they derived all necessary frequencies from a single [[crystal oscillator|quartz crystal]], and to make TV output possible, this quartz had to run at a multiple of the NTSC color subcarrier frequency.

As stated above, Channel 0 is implemented as a counter. Typically, the initial value of the counter is set by sending bytes to the Control, then Data I/O Port registers (the value 36h sent to port 43h, then the low byte to port 40h, and port 40h again for the high byte). The counter counts ''down'' to zero, then sends a [[hardware interrupt]] (IRQ 0, INT 8) to the [[CPU]]. The counter then resets to its initial value and begins to count down again. The fastest possible interrupt frequency is a little over a half of a megahertz. The slowest possible frequency, which is also the one normally used by computers running [[MS-DOS]] or compatible operating systems, is about 18.2 Hz. Under these [[real mode]] operating systems, the BIOS accumulates the number of INT 8 calls that it receives in real mode address 0040:006c, which can be read by a program.

As a timer counts down, its value can also be read directly by reading its I/O port ''twice'', first for the low byte, and then for the high byte. However, in free-running counter applications such as in the x86 PC, it is necessary to first write a [[latch (electronics)|latch]] command for the desired channel to the control register, so that both bytes read will belong to one and the same value.

== Literature ==
* Gilluwe, Frank van. ''The Undocumented PC''. A-W Developers Press, 1997. ISBN 0-201-47950-8

== External links ==
* [http://bochs.sourceforge.net/techspec/intel-82c54-timer.pdf.gz 82C54 Datasheet]
* [http://www.sharpmz.org/mz-700/8253ovview.htm Overview of the Intel 8253 PIT chip]
* [http://www.sharpmz.org/mz-700/memio.htm Intel 8253 complete datasheets]
* [http://www.intel.com/design/archives/periphrl/docs/7178.htm?wapkw=8253 8254/82C54 Programmable Interval Timer FAQ]

== References ==
{{Reflist}}

{{DEFAULTSORT:8253}}
[[Category:Intel chipsets]]
[[Category:IBM PC compatibles]]
[[Category:I/O Chips]]

Talk:S-matrix

2013-05-19T15:57:08Z

131.169.87.137: /* Definition */

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2012-07-09T19:36:35Z

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