Neutron moderator: Difference between revisions

From formulasearchengine
Jump to navigation Jump to search
← Older editNewer edit →
en>BattyBot
m fixed CS1 errors: dates & General fixes using AWB (9816)
en>Hhhippo
→Nuclear weapon design: fixed DAB links
Line 1: Line 1:
{{Infobox CPU
I would like to introduce myself to you, I am Andrew and my wife doesn't like it at all. To play lacross is some thing he would never give up. Office supervising is my occupation. Kentucky is exactly where I've usually been residing.<br><br>Feel free to visit my homepage: online psychics ([http://www.marocflash.com/users/EJEN www.marocflash.com link web site])
| name = Athlon 64
| image = AMD Athlon64.png
| image_size = 138px
| caption =
| produced-start = From 2003 to present
| produced-end =
| slowest = 1.0 | slow-unit = GHz
| fastest = 3.2 | fast-unit = GHz
| hypertransport-slowest = 800 | hypertransport-slow-unit = MT/s
| hypertransport-fastest = 1000 | hypertransport-fast-unit = MT/s
| manuf1 = AMD
| size-from = 0.13µm
| size-to = 65nm
| arch = [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[x86-64]], [[3DNow!]]
| microarch = K8 Microarchitecture
| sock1 = [[Socket 754]], [[Socket 939]], [[Socket 940]], [[Socket AM2]], [[Socket AM2+]]
| numcores = 1
}}
The '''Athlon 64''' is an eighth-generation, [[AMD64]]-architecture [[microprocessor]] produced by [[AMD]], released on September 23, 2003.<ref name="release">{{cite web|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_10218~74465,00.html|title=AMD Ushers in Era of Cinematic Computing with the AMD Athlon 64 FX Processor|accessdate=2006-07-04|date=2003-09-23}}</ref> It is the third processor to bear the name ''[[Athlon]]'', and the immediate successor to the [[Athlon XP]].<ref name="AthlonXP">{{cite web|url=http://techreport.com/reviews/2003q3/athlon64/index.x?pg=1|title=AMD's Athlon 64 Processor|accessdate=2006-07-07|date=2003-09-23|last=Wasson|first=Scott| archiveurl= http://web.archive.org/web/20060709115712/http://techreport.com/reviews/2003q3/athlon64/index.x?pg=1| archivedate= 9 July 2006 <!--DASHBot-->| deadurl= no}}</ref> The second processor (after the [[Opteron]]) to implement AMD64 architecture and the first [[64-bit]] processor targeted at the average consumer,<ref name="nameRelease">{{cite web|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~62652,00.html|title=AMD Announces "AMD Athlon 64" As Brand Name For Next-Generation Desktop And Mobile Processors|accessdate=2006-07-04|date=2002-11-19}}</ref> it was AMD's primary consumer microprocessor, and competes primarily with [[Intel]]'s [[Pentium 4]], especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first [[AMD K8|K8]], eighth-generation processor core for desktop and mobile computers.<ref name="K8CPUID">{{cite web|url=http://www.cpuid.com/reviews/K8/index.php|title=CPUID.com - AMD K8 Architecture|accessdate=2006-07-04|date=2004-02-18| archiveurl= http://web.archive.org/web/20060707102502/http://www.cpuid.com/reviews/K8/index.php| archivedate= 7 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit [[x86]] instructions.<ref name="Architecture">{{cite web|url=http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487%5e9493,00.html|title=Key Architecture Features|accessdate=2006-07-04| archiveurl= http://web.archive.org/web/20060706134237/http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487%5e9493,00.html| archivedate= 6 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Athlon 64s have been produced for [[Socket 754]], [[Socket 939]], [[Socket 940]] and [[Socket AM2]]. The line was succeeded by the dual-core [[Athlon 64 X2]] and [[Athlon X2]] lines.
 
==Background==
[[File:AMD A64 Opteron arch.svg|right|thumb|300px|The K8 architecture]]
The Athlon 64 was originally codenamed ''ClawHammer'' by AMD,<ref name="nameRelease" /> and was referred to as such internally and in press releases. The first Athlon 64 FX was based on the first [[Opteron]] core, ''SledgeHammer''. Both cores, produced on a 130 [[nanometer]] process, were first introduced on September 23, 2003. The models first available were the FX-51, fitting Socket 940, and the 3200+, fitting Socket 754.<ref name="CNETlaunch">{{cite web|url=http://news.com.com/2100-1006_3-5080217.html|title=AMD's Athlon steps up to 64 bits|accessdate=2006-07-06|date=2003-09-23|last=Spooner|first=John|publisher=CNET| archiveurl= http://web.archive.org/web/20060610122642/http://news.com.com/2100-1006_3-5080217.html| archivedate= 10 June 2006 <!--DASHBot-->| deadurl= no}}</ref> Like the Opteron, on which it was based, the Athlon FX-51 required buffered [[Random access memory|RAM]], increasing the final cost of an upgrade.<ref name="Buffered">{{cite web|url=http://www.a1-electronics.net/AMD_Section/CPUs/Athlon_64+FX_Sept03.shtml|title=AMD Athlon 64 & FX CPU processor|accessdate=2006-07-06| archiveurl= http://web.archive.org/web/20060612211203/http://a1-electronics.net/AMD_Section/CPUs/Athlon_64+FX_Sept03.shtml| archivedate= 12 June 2006 <!--DASHBot-->| deadurl= no}}</ref> The week of the Athlon 64's launch, Intel released the [[Pentium 4]] Extreme Edition, a CPU designed to compete with the Athlon 64 FX.<ref name="P4EE">{{cite web|url=http://www.pcstats.com/articleview.cfm?articleID=808|title=Intel Pentium 4 3.2&nbsp;GHz Extreme Edition Processor Review|accessdate=2006-07-08|date=2003-11-07|last=Angelini|first=C.}}</ref> The Extreme Edition was widely considered a marketing ploy to draw publicity away from AMD, and was quickly nicknamed among some circles the "Emergency Edition".<ref name="EmergencyEdition">{{cite web|url=http://www.aceshardware.com/read.jsp?id=60000253|title=Athlon 64, Athlon 64 FX and Pentium 4 Extreme Edition|accessdate=2006-07-06|date=2003-09-23|last=De Gelas|first=Johan| archiveurl= http://web.archive.org/web/20060708110423/http://www.aceshardware.com/read.jsp?id=60000253| archivedate= 8 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Despite a very strong demand for the chip, AMD experienced early manufacturing difficulties that made it difficult to deliver Athlon 64s in quantity. In the early months of the Athlon 64 lifespan, AMD could only produce 100,000 chips per month.<ref name="Production">{{cite web|url=http://www.xbitlabs.com/news/cpu/display/20030922080550.html|title=AMD Athlon 64: Strong Demand or Weak Supply?|accessdate=2006-07-06|date=2003-09-22|last=Shilov|first=Anton| archiveurl= http://web.archive.org/web/20060521173658/http://www.xbitlabs.com/news/cpu/display/20030922080550.html| archivedate= 21 May 2006 <!--DASHBot-->| deadurl= no}}</ref> However, it was very competitive in terms of performance to the Pentium 4, with magazine [[PC World (magazine)|PC World]] calling it the "fastest yet".<ref name="FastestYet">{{cite web|url=http://www.pcworld.com/news/article/0,aid,112603,00.asp|title=First Tests of Athlon 64 PCs: Fastest Yet|accessdate=2006-07-07|date=2003-09-23|last=Mainelli|first=Tom| archiveurl= http://web.archive.org/web/20060718012031/http://www.pcworld.com/news/article/0,aid,112603,00.asp| archivedate= 18 July 2006 <!--DASHBot-->| deadurl= no}}</ref> "Newcastle" was released soon after ClawHammer, with half the Level 2 [[CPU cache|cache]].<ref name="Newcastle">{{cite web|url=http://www.anandtech.com/cpuchipsets/showdoc.html?i=1941|title=AMD's Athlon 64 3400+: Death of the FX-51|accessdate=2006-07-06|date=2004-01-06|last=Lal Shimpi|first=Anand}}</ref>
 
===Single-core Athlon 64===
All of the 64-bit processors sold by AMD so far have their genesis in the ''K8'' or ''Hammer'' project.
On June 1, 2004, AMD released new versions of both the ClawHammer and Newcastle core revisions for the newly introduced [[Socket 939]], an altered [[Socket 940]] without the need for buffered memory.<ref name="Sockets939and940">{{cite web|url=http://www.short-media.com/review.php?r=247|title=Socket 940 vs. 939|accessdate=2006-07-07|date=2004-06-27| archiveurl= http://web.archive.org/web/20060614145842/http://www.short-media.com/review.php?r=247| archivedate= 14 June 2006 <!--DASHBot-->| deadurl= no}}</ref> Socket 939 offered two main improvements over Socket 754: the [[memory controller]] was altered with [[dual-channel architecture]],<ref name="DualChannel">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/athlon64-3800.html|title=Meeting First Socket 939 Processors: AMD Athlon 64 3800+ and Athlon 64 3500+|accessdate=2006-07-07|last=Gavrichenkov|first=Ilya|date=2004-06-01| archiveurl= http://web.archive.org/web/20060719214758/http://www.xbitlabs.com/articles/cpu/display/athlon64-3800.html| archivedate= 19 July 2006 <!--DASHBot-->| deadurl= no}}</ref> doubling peak memory bandwidth, and the [[HyperTransport]] bus was increased in speed from 800&nbsp;MHz to 1000&nbsp;MHz.<ref name="Socket939">{{cite web|url=http://www.tomshardware.com/2004/06/01/amd/|title=AMD's Socket 939 Offers More with Much of the Same|accessdate=2006-07-06|date=2004-06-01|last=Schmid|first=Patrick|author2=Bert Töpelt}}</ref> Socket 939 also was introduced in the FX series in the form of the FX-55.<ref name="FX-55">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/athlon64-fx55.html|title=AMD Raises the Bar: AMD Athlon 64 FX-55 and AMD Athlon 64 4000+ CPUs Review|accessdate=2006-07-06|date=2004-10-18|last=Gavrichenkov|first=Ilya| archiveurl= http://web.archive.org/web/20060814074417/http://www.xbitlabs.com/articles/cpu/display/athlon64-fx55.html| archivedate= 14 August 2006 <!--DASHBot-->| deadurl= no}}</ref> At the same time, AMD also began to ship the "Winchester" core, based on a 90 nanometer process.
 
Core revisions "Venice" and "San Diego" succeeded all previous revisions on April 15, 2005. Venice, the lower-end part, was produced for both Sockets 754 and 939, and included 512&nbsp;[[Kilobyte|KB]] of L2 cache.<ref name="Venice">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/athlon64-venice.html|title=AMD Athlon 64 3800+ CPU: E3 Processor Core aka Venice at the Door|accessdate=2006-07-07|date=2005-04-03|last=Gavrichenkov|first=Ilya| archiveurl= http://web.archive.org/web/20060617003123/http://www.xbitlabs.com/articles/cpu/display/athlon64-venice.html| archivedate= 17 June 2006 <!--DASHBot-->| deadurl= no}}</ref> San Diego, the higher-end chip, was produced only for Socket 939 and doubled Venice's L2 cache to 1&nbsp;[[Megabyte|MB]].<ref name="SanDiego">{{cite web|url=http://www.techgage.com/review.php?id=2790|title=AMD64 3700+ San Diego S939 2.2&nbsp;GHz|accessdate=2006-07-07|date=2005-09-21|last=King|first=Greg}}</ref> Both were produced on the 90&nbsp;nm fabrication process.<ref name="Que8thGen">{{cite web|url=http://www.informit.com/articles/article.aspx?p=481859&seqNum=20|title=Microprocessor Types and Specifications|accessdate=2006-07-07|date=2006-06-12}}</ref> Both also included support for the [[SSE3]] instruction set,<ref name="SSE3">{{cite web|url=http://techreport.com/reviews/2005q2/athlon64-venice/index.x?pg=1|title=
AMD's Athlon 64 3800+ "Venice" processor|accessdate=2006-07-07|date=2005-05-17|last=Wasson|first=Scott| archiveurl= http://web.archive.org/web/20060619122037/http://techreport.com/reviews/2005q2/athlon64-venice/index.x?pg=1| archivedate= 19 June 2006 <!--DASHBot-->| deadurl= no}}</ref> a new feature that had been included in the rival [[Pentium 4]] since the release of the Prescott core in February 2004.<ref name="PrescottSSE3">{{cite web|url=http://www.informit.com/articles/article.aspx?p=339098|title=Enter Prescott: What's different about Intel's latest Pentium 4 variant?|accessdate=2006-07-07|date=2004-07-01}}</ref> In addition, AMD overhauled the memory controller for this revision, resulting in performance improvements as well as support for newer DDR RAM.<ref name="VeniceMemController">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/athlon64-e3-mem.html|title=AMD Athlon 64 Processors on E Core: Memory Controller Peculiarities in Detail|accessdate=2006-07-07|date=2005-07-28|last=Gavrichenkov|first=Ilya| archiveurl= http://web.archive.org/web/20060813175817/http://www.xbitlabs.com/articles/cpu/display/athlon64-e3-mem.html| archivedate= 13 August 2006 <!--DASHBot-->| deadurl= no}}</ref>
 
===Dual-core Athlon 64===
{{main|Athlon 64 X2}}
On April 21, 2005, less than a week after the release of Venice and San Diego, AMD announced its next addition to the Athlon 64 line, the [[Athlon 64 X2]].<ref name="X2Announce">{{cite web|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13743~97108,00.html|title=AMD Announces World’s First 64-Bit, x86 Multi-Core Processors For Servers And Workstations At Second-Anniversary Celebration Of AMD Opteron Processor|accessdate=2006-07-07|date=2005-04-21}}</ref> Released on May 31, 2005,<ref name="X2PressRelease">{{cite web|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~98647,00.html|title=AMD "Shatters The Hourglass" With The Arrival Of The AMD Athlon 64 X2 Dual-Core Processor|accessdate=2006-07-07|date=2005-05-31| archiveurl= http://web.archive.org/web/20060616001128/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~98647,00.html| archivedate= 16 June 2006 <!--DASHBot-->| deadurl= no}}</ref> it also initially had two different core revisions available to the public, Manchester and Toledo, the only appreciable difference between them being the amount of L2 cache.<ref name="X2Cores">{{cite web|url=http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2484|title=Affordable Dual Core from AMD: Athlon 64 X2 3800+|accessdate=2006-07-07|date=2005-08-01|last=Lal Shimpi|first=Anand| archiveurl= http://web.archive.org/web/20060627000504/http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2484| archivedate= 27 June 2006 <!--DASHBot-->| deadurl= no}}</ref> Both were released only for Socket 939.<ref name="X2939">{{cite web|url=http://www.sharkyextreme.com/hardware/cpu/article.php/3565416|title=Athlon 64 X2 4600+ & 4200+ Processor Review|accessdate=2006-07-07|date=2005-11-18|last=Freeman|first=Vince| archiveurl= http://web.archive.org/web/20060619093034/http://www.sharkyextreme.com/hardware/cpu/article.php/3565416| archivedate= 19 June 2006 <!--DASHBot-->| deadurl= no}}</ref> The Athlon 64 X2 was received very well by reviewers and the general public, with a general consensus emerging that AMD's implementation of [[Multi-core (computing)|multi-core]] was superior to that of the competing [[Pentium D]].<ref name="X2Review1">{{cite web|url=http://reviews.cnet.com/4520-10442_7-6389077-9.html?tag=lnav|title=CNET Prizefight: AMD vs. Intel dual-core CPUs|accessdate=2006-07-07|date=2005-11-23|last=Brown|first=Rich}}</ref><ref name="X2Review2">{{cite web|url=http://www.tomshardware.com/2005/05/09/amd/|title=AMD's Dual Core Athlon 64 X2 Strikes Hard|accessdate=2006-07-07|date=2005-05-09|last=Schmid|first=Patrick}}</ref> Some felt initially that the X2 would cause market confusion with regard to price points since the new processor was targeted at the same "enthusiast," US$350 and above market<ref name="Pricing">{{cite web|url=http://www.ehomeupgrade.com/entry/1213/amd_introduces_the|title=AMD Introduces The AMD Athlon 64 X2 Dual-Core Processor 3800+|accessdate=2006-07-07|date=2005-08-02}}</ref> already occupied by AMD's existing socket 939 Athlon 64s.<ref name="MarketConfusion">{{cite web|url=http://www.hardocp.com/article.html?art=NzY2|title=AMD Athlon 64 X2 Preview|accessdate=2006-07-07|last=Bennett|first=Kyle|date=2005-05-09| archiveurl= http://web.archive.org/web/20060614105819/http://www.hardocp.com/article.html?art=NzY2| archivedate= 14 June 2006 <!--DASHBot-->| deadurl= no}}</ref> AMD's official breakdown of the chips placed the Athlon X2 aimed at a segment they called the "prosumer", along with digital media fans.<ref name="X2PressRelease" /> The Athlon 64 was targeted at the mainstream consumer, and the Athlon FX at gamers. The [[Sempron]] budget processor was targeted at value-conscious consumers.<ref name="Positioning">{{cite web|url=http://www.hardocp.com/image.html?image=MTExNTM5NzM4MUNQaDljWXlNc1RfMV8yX2wuZ2lm|title=AMD Desktop Processor Positioning|accessdate=2006-07-07}}</ref> Following the launch of the Athlon 64 X2, AMD surpassed Intel in US retail sales for a period of time, although Intel retained overall market leadership because of its exclusive relationships with direct sellers such as Dell.<ref name="MarketShift1">{{cite web|url=http://news.cnet.com/AMD-surpasses-Intel-in-U.S.-retail-stores/2100-1006_3-5939522.html|title=AMD surpasses Intel in U.S. retail stores|accessdate=2009-12-29|date=2005-11-08|last=Kawamoto|first=Dawn}}</ref>
 
===DDR2===
The Athlon 64 had been maligned by some critics for some time because of its lack of support for [[DDR2 SDRAM]], an emerging technology that had been adopted much earlier by Intel.<ref name="DDR2criticism">{{cite web|url=http://www.pcper.com/article.php?aid=132|title=AMD Athlon 64 Rev F Update: DDR2 and Socket M2?|accessdate=2006-07-07|date=2005-04-26|last=Shrout|first=Ryan| archiveurl= http://web.archive.org/web/20060709230751/http://www.pcper.com/article.php?aid=132| archivedate= 9 July 2006 <!--DASHBot-->| deadurl= no}}</ref> AMD's official position was that the [[CAS latency]] on DDR2 had not progressed to a point where it would be advantageous for the consumer to adopt it.<ref name="DDR2rejected">{{cite web|url=http://www.xbitlabs.com/news/memory/display/20040326063601.html|title=AMD Rejects DDR2, Gives Additional Speed Headroom for DDR|accessdate=2006-07-07|date=2004-03-26|last=Shilov|first=Anton}}</ref> AMD finally remedied this gap with the "Orleans" core revision, the first Athlon 64 to fit [[Socket AM2]], released on May 23, 2006.<ref name="AM2launch">{{cite web|url=http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~108605,00.html|title=AMD Delivers Desktop Product Powerhouse While Reducing Costs For Ecosystem Partners|accessdate=2006-07-07|date=2006-05-23| archiveurl= http://web.archive.org/web/20060715134707/http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543%7E108605,00.html| archivedate= 15 July 2006 <!--DASHBot-->| deadurl= no}}</ref> "Windsor", an Athlon 64 X2 revision for Socket AM2, was released concurrently. Both Orleans and Windsor have either 512 [[Kilobyte|KB]] or 1 [[Megabyte|MB]] of L2 cache per core.<ref name="AM2cache">{{cite web|url=http://www.digital-daily.com/cpu/amd_am2_4000/|title=Debut of AMD AM2: the long-awaited DDR2 on AMD Athlon X2 |accessdate=2006-07-07 |date=2006-05-23 |last=Romanchenko |first=Vladimir |author2=Sofronov, Dmitry | archiveurl= http://web.archive.org/web/20060718175147/http://digital-daily.com/cpu/amd_am2_4000/| archivedate= 18 July 2006 <!--DASHBot-->| deadurl= no}}</ref> The Athlon 64 FX-62 was also released concurrently on the Socket AM2 platform.<ref name="FX62">{{cite web |url=http://www.pcper.com/article.php?aid=252&type=expert |title=AMD's AM2 Platform: Athlon 64 FX-62 Processor Review |accessdate=2006-07-07 |date=2006-05-23 |last=Shrout |first=Ryan | archiveurl= http://web.archive.org/web/20060709050733/http://www.pcper.com/article.php?aid=252&type=expert| archivedate= 9 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Socket AM2 also consumes less power than previous platforms, and supports [[AMD-V]].<ref name="AM2Benefits">{{cite web |url=http://www.short-media.com/review.php?r=316 |title=AMD Socket AM2 Review |accessdate=2006-07-07 |date=2006-05-23 | archiveurl= http://web.archive.org/web/20060616074050/http://www.short-media.com/review.php?r=316| archivedate= 16 June 2006 <!--DASHBot-->| deadurl= no}}</ref>
 
The memory controller used in all DDR2 SDRAM capable processors (Socket AM2), has extended column address range of 11 columns instead of conventional 10 columns, and the support of 16 KB page size, with at most 2048 individual entries supported. An [[OCZ]] unbuffered DDR2 kit, optimized for [[64-bit]] [[operating systems]], was released to exploit the functionality provided by the memory controller in socket AM2 processors, allowing the memory controller to stay longer on the same page, thus benefitting graphics intensive applications.<ref>{{cite web|url=http://www.ocztechnology.com/products/memory/ocz_ddr2_pc2_5400_am2_special_4gb-8gb_kit|title=OCZ product page}}</ref>
 
===Moving to the subnotebook space===
The Athlon architecture was further extended with the release of '''Athlon Neo''' processors on January 9, 2009. Based on the same architecture as the other Athlon 64 variants, the new processor features a small package footprint targeting [[Subnotebook|Ultra-portable notebook]] market.
{| class="wikitable" align="center"
!colspan="8"|AMD Athlon 64 processor family
|-
!rowspan="2"|Logo
!colspan="3"|[[Desktop computer|Desktop]]
!rowspan="2"|Logo
!colspan="3"|[[Laptop]]
|-
!Code-named
!Core
!Date released
!Code-named
!Core
!Date released
|- style="background:white"
|[[File:AMD Athlon64.jpg|95px|Athlon 64 logo as of 2003]]
|ClawHammer<br>Newcastle<br>Winchester<br>Venice<br>Manchester *<br>San Diego<br>Toledo *
|130&nbsp;nm<br>130&nbsp;nm<br>90&nbsp;nm<br>90&nbsp;nm<br>90&nbsp;nm<br>90&nbsp;nm<br>90&nbsp;nm
|Dec 2003<br>Dec 2003<br>Oct 2004<br>April 2005<br>May 2005<br>May 2005<br>May 2005
|[[File:AMD Athlon64 Mobile.jpg|95px|Athlon 64 Mobile logo as of 2003]]
|ClawHammer<br>Odessa<br>Oakville<br>Newark
|130&nbsp;nm<br>130&nbsp;nm<br>90&nbsp;nm<br>90&nbsp;nm
|Dec 2003<br>Feb 2004<br>Aug 2004<br>Apr 2005
|- style="background:white"
|[[File:AMD Athlon64 FX.jpg|95px|Athlon 64 FX logo as of 2003]]
|SledgeHammer<br>ClawHammer<br>San Diego
|130&nbsp;nm<br>130&nbsp;nm<br>90&nbsp;nm
|Sep 2003<br>Jun 2004<br>Jun 2005
!
!colspan="3"|
|- style="background:white"
|[[File:AMD Athlon64.png|100px|Athlon 64 logo as of 2008]]
|Orleans<br>Lima
|65&nbsp;nm<br>65&nbsp;nm
|Feb 2007<br>May 2007
|[[File:AMD Athlon64 Neo.png|100px|Athlon Neo logo as of 2008]]
|Huron
|65&nbsp;nm
|Jan 2009
|-
!colspan="8"|<small>* [[Athlon X2]] with one cache disabled<br>[[List of AMD Athlon 64 microprocessors]]</small>
|}
 
==Features==
There are four variants: ''Athlon 64'', ''Athlon 64 FX'', ''Mobile Athlon 64'' (later renamed "[[Turion 64]]") and the dual-core ''[[Athlon 64 X2]]''.<ref name="Family">{{cite web|url=http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9484,00.html|title=AMD Athlon 64 Processor Family|accessdate=2006-07-04| archiveurl= http://web.archive.org/web/20060705060635/http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9484,00.html| archivedate= 5 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Common among the Athlon 64 line are a variety of instruction sets including [[MMX (instruction set)|MMX]], [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], and [[SSE3]].<ref name="DataSheet">{{cite web|url=http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24659.PDF|title=AMD Athlon 64 Product Data Sheet|accessdate=2006-07-08|date=June 2004|format=PDF| archiveurl= http://web.archive.org/web/20060628225255/http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24659.PDF| archivedate= 28 June 2006 <!--DASHBot-->| deadurl= no}}</ref> All Athlon 64s also support the [[NX bit]], a security feature named "Enhanced Virus Protection" by AMD.<ref name="NXBit">{{cite news|title='No Execute' Flag Waves Off Buffer Attacks|url=http://www.washingtonpost.com/wp-dyn/articles/A55209-2005Feb26.html|last=Breeden II|first=John|publisher=The Washington Post|date=2005-02-27|accessdate=2006-07-08|page=F07}}</ref> And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run [[16 bit]], 32 bit [[x86]], and [[AMD64]] [[machine code|code]], through two different modes the processor can run in: "[[Legacy mode]]" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit [[operating system]].<ref name="Modes">{{cite web|url=http://www.hothardware.com/viewarticle.aspx?articleid=202&catid=1|title=The Athlon 64 FX-51 Processor|accessdate=2006-07-08|date=2003-09-23}}</ref> All Athlon 64 processors feature 128&nbsp;[[Kilobyte]]s of level 1 cache, and at least 512&nbsp;KB of level 2 cache.<ref name="DataSheet" />
 
===On-die memory controller===
The Athlon 64 features an on-die memory controller,<ref name="Architecture" /> a feature previously seen on only the [[Transmeta Crusoe]]. Not only does this mean the controller runs at the same clock rate as the CPU itself, it also means the electrical signals have a shorter physical distance to travel compared to the old [[northbridge (computing)|northbridge]] interfaces.<ref name="VsNorthbridge">{{cite web|url=http://www.pcstats.com/articleview.cfm?articleid=1469&page=5|title=AMD Athlon64 3200+ 32/64-bit Processor Review|accessdate=2006-07-07}}</ref> The result is a significant reduction in latency (response time) for access requests to main memory.<ref name="LatencyReduction">{{cite web|url=http://www.neoseeker.com/Articles/Hardware/Reviews/venice3800/|title=Athlon 64 Venice 3800+ Review|accessdate=2006-07-07|last=Tong|first=Terren|date=2005-05-03| archiveurl= http://web.archive.org/web/20060614105348/http://www.neoseeker.com/Articles/Hardware/Reviews/venice3800/| archivedate= 14 June 2006 <!--DASHBot-->| deadurl= no}}</ref> The lower latency was often cited as one of the advantages of the Athlon 64's architecture over those of its competitors at the time.<ref name="MemoryLatency">{{cite web|url=http://www.hardocp.com/article.html?art=NTI0LDQ=|title=Athlon 64 Vs. Pentium 4|accessdate=2006-07-04| archiveurl= http://web.archive.org/web/20060603201609/http://www.hardocp.com/article.html?art=NTI0LDQ=| archivedate= 3 June 2006 <!--DASHBot-->| deadurl= no}}</ref>
 
===Translation Lookaside Buffers===
[[Translation Lookaside Buffer]]s (TLBs) have also been enlarged (40 4k/2M/4M entries in L1 cache, 512 4k entries),<ref name="HammerPreview">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/hammer-preview.html|title=A Glance at the Future: AMD Hammer Processors and x86-64 Technology|accessdate=2006-07-08|date=2002-08-14| archiveurl= http://web.archive.org/web/20060619141521/http://xbitlabs.com/articles/cpu/display/hammer-preview.html| archivedate= 19 June 2006 <!--DASHBot-->| deadurl= no}}</ref> with reduced latencies and improved branch prediction, with four times the number of bimodal counters in the global history counter.<ref name="Modes" /> This and other architectural enhancements, especially as regards SSE implementation, improve instruction per cycle ([[Instructions Per Clock|IPC]]) performance over the previous Athlon XP generation.<ref name="Modes" /> To make this easier for consumers to understand, AMD has chosen to market the Athlon 64 using a [[Performance Rating|PR]] (Performance Rating) system, where the numbers roughly map to Pentium 4 performance equivalents, rather than actual clock speed.<ref name="PRrating">{{cite web|url=http://www.cpu-world.com/info/AMD/Athlon-model-number.html|title=AMD Athlon XP/MP, Sempron and Athlon 64 model numbers|accessdate=2006-07-08| archiveurl= http://web.archive.org/web/20060708223218/http://www.cpu-world.com/info/AMD/Athlon-model-number.html| archivedate= 8 July 2006 <!--DASHBot-->| deadurl= no}}</ref>
 
===Cool'n'Quiet===
Athlon 64 also features [[Central processing unit|CPU]] speed throttling technology branded ''[[Cool'n'Quiet]]'', a feature similar to Intel's ''[[SpeedStep]]'' that can throttle the processor's clock speed back to facilitate lower power consumption and heat production.<ref name="CnQ">{{cite web|url=http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487%5E10272,00.html|title=Cool'n'Quiet Technology Overview|accessdate=2006-07-08| archiveurl= http://web.archive.org/web/20060712220024/http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487%5E10272,00.html| archivedate= 12 July 2006 <!--DASHBot-->| deadurl= no}}</ref> When the user is running undemanding applications and the load on the processor is light, the processor's clock speed and voltage are reduced. This in turn reduces its peak power consumption (max TDP set at 89 W by AMD) to as low as 32 W ([[stepping (version numbers)|stepping]] C0, clock speed reduced to 800&nbsp;MHz) or 22W (stepping CG, clock speed reduced to 1&nbsp;GHz). The Athlon 64 also has an [[Integrated Heat Spreader]] (IHS) which prevents the CPU die from accidentally being damaged when mounting and unmounting heat sinks. With prior AMD CPUs a [[CPU shim]] could be used by people worried about damaging the die.
 
===NX bit===
The [[NX bit|No Execute bit (NX bit)]] supported by [[Windows XP]] Service Pack 2 and future versions of Windows, [[Linux]] 2.6.8 and higher and [[FreeBSD]] 5.3 and higher is also included, for improved protection from malicious buffer overflow security threats. Hardware-set permission levels make it much more difficult for malicious code to take control of the system. It is intended to make [[64-bit computing]] a more secure environment.
 
The Athlon 64 CPUs have been produced with 130&nbsp;nm and 90&nbsp;nm [[Silicon on insulator|SOI]] process technologies.<ref name="fab">{{cite web|url=http://www.techreport.com/onearticle.x/7417|accessdate=2006-09-20|title=AMD 90&nbsp;nm power consumption measured|last=Wasson|first=Scott|date=2004-10-04}}</ref> All of the latest chips (Winchester, Venice and San Diego models) are on 90&nbsp;nm. The Venice and San Diego models also incorporate dual stress liner technology<ref name="dslvenice">{{cite web|url=http://www.xbitlabs.com/articles/cpu/display/athlon64-venice_2.html|title=AMD Athlon 64 3800+ CPU: E3 Processor Core aka Venice at the Door|accessdate=2006-09-20|date=2005-04-03|last=Gavrichenkov|first=Ilya| archiveurl= http://web.archive.org/web/20060912181505/http://www.xbitlabs.com/articles/cpu/display/athlon64-venice_2.html| archivedate= 12 September 2006 <!--DASHBot-->| deadurl= no}}</ref> (an amalgam of [[strained silicon]] and 'squeezed silicon', the latter of which is not actually a technology) co-developed with IBM.<ref name="dsl">{{cite web|url=http://techzone.pcvsconsole.com/news.php?tzd=2861|title=AMD, IBM Dual Stress Liner Semiconductor Manufacturing Breakthrough|accessdate=2006-09-20|date=2004-12-13| archiveurl= http://web.archive.org/web/20061021213343/http://techzone.pcvsconsole.com/news.php?tzd=2861| archivedate= 21 October 2006 <!--DASHBot-->| deadurl= no}}</ref>
 
As the memory controller is integrated onto the CPU die, there is no FSB for the system memory to base its speed upon.<ref name="nofsb">{{cite web|url=http://experts.about.com/q/Computer-Science-3197/Side-Bus.htm|title=Front Side Bus|accessdate=2006-09-20|date=2006-09-09}}</ref> Instead, system memory speed is obtained by using the following formula (using the [[Floor function#The ceiling function|ceiling function]]):<ref>PC Magazine</ref>
 
:<math>\frac{\mathrm{CPU~speed}}{\left\lceil\frac{\mathrm{CPU~multiplier}}{\mathrm{DRAM~divider}}\right\rceil}=\mathrm{DRAM~speed}</math>
 
In simpler terms, the memory is always running at a set fraction of the CPU speed, with the divisor being a whole number. A 'FSB' figure is still used to determine the CPU speed, but the RAM speed is no longer directly related to this 'FSB' figure (known otherwise as the LDT).
 
To summarize, the Athlon 64 architecture features two buses from the CPU. One is the [[HyperTransport|HT Bus]] to the northbridge connecting the CPU to the chipset and device attachment bus (PCIe, AGP, PCI) and the other is the memory bus which connects the on-board memory controller to the bank of either DDR or DDR2 DRAM.
 
==Processor cores==
 
===Athlon 64 FX===
The Athlon 64 FX is positioned as a hardware enthusiast product, marketed by AMD especially toward [[gamer]]s.<ref name="FXbrief">{{cite web|url=http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9488%5E9536,00.html|title=AMD Athlon 64 FX Processor Product Brief|accessdate=2006-07-04| archiveurl= http://web.archive.org/web/20060704233135/http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9488^9536,00.html| archivedate= 4 July 2006 <!--DASHBot-->| deadurl= no}}</ref> Unlike the standard Athlon 64, all of the Athlon 64 FX processors have their multipliers completely unlocked.<ref name="FXMultiplier">{{cite web|url=http://www.ocmodshop.com/ocmodshop.aspx?a=324|title=AMD Athlon 64 FX-60 Review|accessdate=2006-07-08|date=2006-07-05|last=Leeth|first=Tim| archiveurl= http://web.archive.org/web/20060708195809/http://www.ocmodshop.com/ocmodshop.aspx?a=324| archivedate= 8 July 2006 <!--DASHBot-->| deadurl= no}}</ref> The FX line is now dual-core, starting with the FX-60.<ref name="FXDualCore">{{cite web|url=http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2668|title=AMD Athlon 64 FX-60: A Dual-Core farewell to Socket-939|accessdate=2006-07-08|date=2006-01-09|last=Lal Shimpi|first=Anand| archiveurl= http://web.archive.org/web/20060707091004/http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2668| archivedate= 7 July 2006 <!--DASHBot-->| deadurl= no}}</ref> The FX always has the highest clock speed of all Athlons at its release.<ref name="FXClock">{{cite web|url=http://www.tomshardware.com/2006/01/10/amd_athlon_fx_60_dual_core_assault/page2.html|title=AMD Athlon FX-60's Dual-Core Assault|accessdate=2006-07-08|date=2006-01-10|last=Schmid|first=Patrick|author2=Töpelt, Bert}}</ref> From FX-70 onwards, the line of processors will also support dual-processor setup with [[Non-uniform memory access|NUMA]], named [[AMD Quad FX platform]].
 
===Athlon 64 X2===
{{main|Athlon 64 X2}}
The Athlon 64 X2 is the first [[multi-core (computing)|dual-core]] [[desktop computer|desktop]] [[Central processing unit|CPU]] manufactured by [[AMD]].
In 2007, AMD released two final Athlon 64 X2 versions: the AMD Athlon 64 X2 6400+ and 5000+ Black Editions. Both processors feature an unlocked multiplier, which allows for a large range of overclocked settings. The 6400+ is based on a 90&nbsp;nm Windsor core (3.2&nbsp;GHz, 2x1MB L2, 125W TDP) while the 5000+ is based on a 65&nbsp;nm Brisbane core (2.6&nbsp;GHz, 2x512KB L2, 65W TDP). These Black Edition processors are available at retail, but AMD does not include heatsinks in the retail package.
 
===Turion 64 (formerly Mobile Athlon 64)===
{{main|Turion 64}}
[[Image:AMD Turion 64 Lancaster MT-34 (top).jpg|thumb|right|130px|Model MT-34]]
[[Image:AMD Turion 64 Lancaster MT-34 (bottom).jpg|thumb|right|130px|MT-34 (bottom)]]
Previously introduced as "Mobile Athlon 64", '''Turion 64''' is now the [[brand name]] [[AMD]] applies to its 64-bit low-power consumption (''mobile'') [[Central Processing Unit|processors]]. The [[Turion 64]] and [[Turion 64 X2]] processors compete with [[Intel]]'s mobile processors, initially the ''[[Pentium M]]'' and later the [[Intel Core]] and [[Intel Core 2]] processors.
 
Earlier Turion 64 processors are compatible with AMD's [[Socket 754]]. The newer "Richmond" models are designed for AMD's [[Socket S1]]. They are equipped with 512 or 1024&nbsp;[[Kilobyte|KB]] of L2 cache, a 64-bit single channel on-die memory controller, and an 800&nbsp;MHz [[HyperTransport]] bus. Battery saving features, like ''[[PowerNow!]]'', are central to the marketing and usefulness of these CPUs.
 
====Model naming methodology====
The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a [[PR rating]]. The first letter is M for single core processors and T for dual core [[Turion 64 X2]] processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (frugal power consumption). Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 consumes less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.
 
===Athlon Neo===
With 27&nbsp;mm × 27&nbsp;mm in size and 2.5&nbsp;mm in thickness, the Athlon Neo processors utilize a new package called "ASB1", essentially a [[Ball grid array|BGA]] package, for smaller footprint to allow smaller designs for notebooks and lowering the cost. The clock of the processors is significantly lower than desktop and other mobile counterparts to reach a low TDP, at 15W maximum for a single core x86-64 CPU at 1.6&nbsp;GHz. The Athlon Neo processors are equipped with 512 KB of L2 cache and HyperTransport 1.0 running at 800&nbsp;MHz frequency.
 
==Sockets==
* [[Socket 754]]: The Athlon 64 value/budget line, 64-bit memory interface (Single-Channel)
* [[Socket 939]]: Athlon 64 performance line, [[Athlon 64 X2]]s, and newer Athlon 64 FXs, [[Opteron]], 128-bit memory interface ([[Dual-channel]])
* [[Socket 940]]: [[Opteron]] and old Athlon 64 FX, 128-bit memory interface - requires registered DDR memory
* [[Socket AM2]]: Athlon 64/Athlon 64 FX/Athlon 64 X2/[[Sempron]], 940 Pins (Not compatible with Socket 940); the first AMD socket to use [[DDR2 SDRAM]].
* [[Socket F]]: Opteron, 1207 Pins
* [[Socket F#1207 FX|Socket F (1207 FX)]]: Athlon 64 FX on [[AMD Quad FX platform]], also compatible for dual-processor [[Opteron]] 2200 series<ref>{{cite web|url=http://dailytech.com/article.aspx?newsid=5968|title=DialyTech report: AMD Opteron 2200-series Works in Quad FX Motherboards}}</ref>
 
At the introduction of Athlon 64 in September 2003, only Socket 754 and Socket 940 (Opteron) were ready and available. The onboard memory controller was not capable of running unbuffered (non-registered) memory in dual-channel mode at the time of release; as a stopgap measure, they introduced the Athlon 64 on Socket 754, and brought out a non-multiprocessor version of the Opteron called the Athlon 64 FX, as a multiplier unlocked enthusiast part for Socket 940, comparable to Intel's Pentium 4 Extreme Edition for the high end market.
 
In June 2004, AMD released Socket 939 as the mainstream Athlon 64 with dual-channel memory interface, leaving Socket 940 solely for the server market (Opterons), and relegating Socket 754 as a value/budget line, for Semprons and slower versions of the Athlon 64. Eventually Socket 754 replaced [[Socket A]] for Semprons.
 
In May 2006, AMD released Socket AM2, which provided support for the DDR2 memory interface. Also, this marked the release of [[AMD-V]].
 
In August 2006, AMD released Socket F for [[Opteron]] server CPU which uses the [[Land grid array|LGA]] chip form factor.
 
In November 2006, AMD released a specialized version of Socket F, called 1207 FX, for dual-socket, dual-core Athlon FX processors on the Quad FX platform. While Socket F Opterons already allowed for four processor cores, Quad FX allowed unbuffered RAM and expanded CPU/chipset configuration in the BIOS. Consequentially, Socket F and F 1207 FX are incompatible and require different processors, chipsets, and motherboards.
 
==Athlon 64 FX models==
 
===Sledgehammer (130&nbsp;nm SOI)===
* CPU-Stepping: '''C0, CG'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 1024 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[AMD64]]
* [[Socket 940]], 800&nbsp;MHz [[HyperTransport]] (HT800)
* Registered DDR-SDRAM required
* VCore: 1.50/1.55 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: September 23, 2003
* Clockrate: 2200&nbsp;MHz ('''FX-51''', C0), 2400&nbsp;MHz ('''FX-53''', C0 and CG)
 
===Clawhammer (130&nbsp;nm SOI)===
* CPU-Stepping: ''' CG'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 1024 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[AMD64]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.50 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt ('''FX-55''':104 Watt)
* First Release: June 1, 2004
* Clockrate: 2400&nbsp;MHz ('''FX-53'''), 2600&nbsp;MHz ('''FX-55''')
 
===San Diego (90&nbsp;nm SOI)===
* CPU-Stepping: '''E4, E6'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 1024 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.35 V or 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 104 Watt max
* First Release: April 15, 2005
* Clockrate: 2600&nbsp;MHz ('''FX-55'''), 2800&nbsp;MHz ('''FX-57''')
 
===Toledo (90&nbsp;nm SOI)===
Dual-core CPU
* CPU-Stepping: '''E6'''
* L1-Cache: 64 + 64 KB (Data + Instructions), per core
* L2-Cache: 1024 KB fullspeed, per core
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.30 V - 1.35 V
* Power Consumption ([[Thermal Design Power|TDP]]): 110 Watt max
* First Release: January 10, 2006
* Clockrate: 2600&nbsp;MHz ('''FX-60''')
 
===Windsor (90&nbsp;nm SOI)===<!-- Windsor DAB links here, pls, do not change name -->
Dual-core CPU
* CPU-Stepping: '''F2, F3'''
* L1-Cache: 64 + 64 KB (Data + Instructions), per core
* L2-Cache: 512 - 1024 KB fullspeed, per core
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[Socket AM2]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.30 V - 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 125 Watt max
* First Release: May 23, 2006
* Clockrate: 2000&nbsp;-&nbsp;3200&nbsp;MHz ('''6400+'''), 2800&nbsp;MHz ('''FX-62''')
 
===Windsor (90&nbsp;nm SOI) - Quad FX platform===
{{main|AMD Quad FX platform}}
Dual-core, dual CPUs (four cores total)
* CPU-Stepping: '''F3'''
* L1-Cache: 64 + 64 KB (Data + Instructions), per core
* L2-Cache: 1024 KB fullspeed, per core
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[Socket F#1207 FX|Socket F (1207 FX)]], 2000&nbsp;MHz [[HyperTransport]] (HT2000)
* VCore: 1.35 V - 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 125 Watt max per CPU
* First Release: November 30, 2006
* Clockrate: 2600&nbsp;MHz ('''FX-70'''), 2800&nbsp;MHz ('''FX-72'''), 3000&nbsp;MHz ('''FX-74''')
 
==Athlon 64 models==
 
===Clawhammer (130&nbsp;nm SOI)===
* CPU-Stepping: '''C0, CG'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 1024 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit|NX Bit (only '''CG''')]]
* [[Socket 754]], 800&nbsp;MHz [[HyperTransport]] (HT800)
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.50 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: September 23, 2003
* Clockrate: 2000–2600&nbsp;MHz
 
===Newcastle (130&nbsp;nm SOI)===
Also possible: ClawHammer-512 (Clawhammer with partially disabled L2-Cache)
* CPU-Stepping: '''CG'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 754]], 800&nbsp;MHz [[HyperTransport]] (HT800)
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.50 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: 2004
* Clockrate: 1800–2400&nbsp;MHz
 
===Winchester (90&nbsp;nm SOI)===
* CPU-Stepping: '''D0'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 67 Watt max
* First Release: 2004
* Clockrate: 1800–2200&nbsp;MHz
 
===Venice (90&nbsp;nm SOI)===
* CPU-Stepping: '''E3, E6'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 754]], 800&nbsp;MHz [[HyperTransport]] (HT800)
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.35 V or 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: April 4, 2005
* Clockrate: 1800–2400&nbsp;MHz
 
===San Diego (90&nbsp;nm SOI)===
* CPU-Stepping: '''E4, E6'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 1024 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.35 V or 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: April 15, 2005
* Clockrate: 2200–2600&nbsp;MHz
 
===Manchester (90&nbsp;nm SOI)===
* CPU-Stepping: '''F1'''
* L1-Cache: 2 x 64 + 2 x 64 KB (Data + Instructions)
* L2-Cache: 2 x 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]]
* [[Socket 939]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.35 V
* Power Consumption ([[Thermal Design Power|TDP]]): 89 Watt max
* First Release: April 15, 2005
* Clockrate: 2200–2600&nbsp;MHz
 
===Orleans (90&nbsp;nm SOI)===
* CPU-Stepping: '''F2, F3'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, 1M
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[Socket AM2]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.25 V or 1.40 V
* Power Consumption ([[Thermal Design Power|TDP]]): 62 Watt max
* First Release: May 23, 2006
* Clockrate: 1800–2600&nbsp;MHz
 
===Lima (65&nbsp;nm SOI)===
* CPU-Stepping: '''G1'''
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[Socket AM2]], 1000&nbsp;MHz [[HyperTransport]] (HT1000)
* VCore: 1.25/1.35/1.40V
* Power Consumption ([[Thermal Design Power|TDP]]): 45 Watt max
* First Release: February 20, 2007
* Clockrate: 2000–2800&nbsp;MHz
 
==Athlon Neo==
 
===Huron (65&nbsp;nm SOI)===
* CPU-Stepping: G2
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[ASB1 (chip package)|ASB1 package]] ([[Ball grid array|BGA]]), 800&nbsp;MHz [[HyperTransport]] (HT800)
* VCore: 1.1 V
* Power Consumption ([[Thermal Design Power|TDP]]): 15 Watt max
* First Release: January 8, 2009
* Clockrate: 1600&nbsp;MHz
 
===Athlon X2 Dual Core Processor L310===
* Generation: K8
* 65&nbsp;nm SOI
* CPU-Stepping: G
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: 512 KB, fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]](?), [[NX Bit]], [[AMD-V]]
* [[ASB1 (chip package)|ASB1 package]] ([[Ball grid array|BGA]]), 800&nbsp;MHz [[HyperTransport]] (HT800)
* Power Consumption ([[Thermal Design Power|TDP]]): 13 Watt max
* PowerNow: No
* P-States: 1
* Clockrate: 1200&nbsp;MHz
 
===Athlon X2 Dual Core Processor L335===
* Generation: K8
* 65&nbsp;nm SOI
* CPU-Stepping: G
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: (2*256 KB), fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]](?), [[NX Bit]], [[AMD-V]]
* [[ASB1 (chip package)|ASB1 package]] ([[Ball grid array|BGA]]), 800&nbsp;MHz [[HyperTransport]] (HT800)
* Power Consumption ([[Thermal Design Power|TDP]]): 18 Watt max
* PowerNow: Yes
* Clockrate: 1600&nbsp;MHz
 
===Turion Neo X2 Dual Core Processor L625===
* Generation: K8
* 65&nbsp;nm SOI
* CPU-Stepping: G2
* L1-Cache: 64 + 64 KB (Data + Instructions)
* L2-Cache: (2*512 KB), fullspeed
* [[MMX (instruction set)|MMX]], Extended [[3DNow!]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[AMD64]], [[Cool'n'Quiet]], [[NX Bit]], [[AMD-V]]
* [[ASB1 (chip package)|ASB1 package]] ([[Ball grid array|BGA]]), 800&nbsp;MHz [[HyperTransport]] (HT800)
* Power Consumption ([[Thermal Design Power|TDP]]): 18 Watt max
* PowerNow: Yes
* Clockrate: 1600&nbsp;MHz
 
==Successors==
The Athlon 64 was succeeded by the [[AMD K10|K10]] architecture in 2007, including but not limited to the [[AMD Phenom|Phenom]] and [[AMD Phenom II|Phenom II]] processors. These successors feature higher core counts per CPU, and implement Hypertransport 3.0 and Socket AM2+/AM3.
 
As of February 2012, Athlon64 X2 processors were still available for sale.<ref>{{cite web |url=https://www.google.com/search?hl=en&tbm=shop&q=athlon+64+x2 |title=Google Shopping: Athlon 64 X2 |publisher=Google |accessdate=2012-02-28 |date=2012-02-28}}</ref>
 
==See also==
* [[64-bit]]
* [[List of AMD Athlon 64 microprocessors]]
* [[List of AMD Sempron microprocessors]]
* [[List of AMD Turion microprocessors]]
 
==References==
{{Reflist|colwidth=30em}}
 
==External links==
* [http://www.digit-life.com/articles2/amd-hammer-family/index.html Facts & Assumptions about the Architecture of AMD Opteron and Athlon 64]
* [http://arstechnica.com/articles/paedia/cpu/amd-hammer-1.ars?27420 Inside AMD's Hammer: the 64-bit architecture behind the Opteron and Athlon 64]
* [http://tuxmobil.org/cpu_64bit.html Linux on laptops with 64bit CPU]
* [http://www.xbitlabs.com/articles/cpu/display/athlon64-90&nbsp;nm.html xBitLabs article about AMD's move to 90&nbsp;nm]
* [http://www.silentpcreview.com/article169-page1.html Athlon 64 for Quiet Power]
* [http://balusc.xs4all.nl/srv/har-cpu-amd-k8.php AMD Athlon 64 technical specifications]
 
{{AMD_processors}}
 
[[Category:2003 introductions]]
[[Category:Advanced Micro Devices x86 microprocessors]]

Revision as of 22:45, 17 February 2014

I would like to introduce myself to you, I am Andrew and my wife doesn't like it at all. To play lacross is some thing he would never give up. Office supervising is my occupation. Kentucky is exactly where I've usually been residing.

Feel free to visit my homepage: online psychics (www.marocflash.com link web site)

Retrieved from "https://en.formulasearchengine.com/index.php?title=Neutron_moderator&oldid=225581"