Metzler matrix: Difference between revisions

Latest revision as of 19:01, 10 November 2013

A lookahead carry unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

4-bit adder

A single 4-bit CLA is shown below:

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.

The LCU accepts the group propagate ( $P_{G}$ ) and group generate ( $G_{G}$ ) from each of the four CLAs. $P_{G}$ and $G_{G}$ have the following expressions for each CLA adder:^[1]

P_{G} = P_{3} \cdot P_{2} \cdot P_{1} \cdot P_{0}

G_{G} = G_{3} + P_{3} \cdot G_{2} + P_{3} \cdot P_{2} \cdot G_{1} + P_{3} \cdot P_{2} \cdot P_{1} \cdot G_{0}

The LCU then generates the carry input for each CLA.

Assume that $P_{i}$ is $P_{G}$ and $G_{i}$ is $G_{G}$ from the i^th CLA then the output carry bits are

C_{4} = G_{0} + P_{0} \cdot C_{0}

C_{8} = G_{4} + P_{4} \cdot C_{4}

C_{12} = G_{8} + P_{8} \cdot C_{8}

C_{16} = G_{12} + P_{12} \cdot C_{12}

Substituting $C_{4}$ into $C_{8}$ , then $C_{8}$ into $C_{12}$ , then $C_{12}$ into $C_{16}$ yields the expanded equations:

C_{4} = G_{0} + P_{0} \cdot C_{0}

C_{8} = G_{4} + G_{0} \cdot P_{4} + C_{0} \cdot P_{0} \cdot P_{4}

C_{12} = G_{8} + G_{4} \cdot P_{8} + G_{0} \cdot P_{4} \cdot P_{8} + C_{0} \cdot P_{0} \cdot P_{4} \cdot P_{8}

C_{16} = G_{12} + G_{8} \cdot P_{12} + G_{4} \cdot P_{8} \cdot P_{12} + G_{0} \cdot P_{4} \cdot P_{8} \cdot P_{12} + C_{0} \cdot P_{0} \cdot P_{4} \cdot P_{8} \cdot P_{12}

$C_{4}$ corresponds to the carry input into the second CLA; $C_{8}$ to the third CLA; $C_{12}$ to the fourth CLA; and $C_{16}$ to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate:

P_{L C U} = P_{0} \cdot P_{4} \cdot P_{8} \cdot P_{12}

G_{L C U} = G_{12} + G_{8} \cdot P_{12} + G_{4} \cdot P_{8} \cdot P_{12} + G_{0} \cdot P_{4} \cdot P_{8} \cdot P_{12} + C_{0} \cdot P_{0} \cdot P_{4} \cdot P_{8} \cdot P_{12} = C_{16}

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder. Four of these units can be combined to form a 64-bit adder. An additional (second-level) LCU is needed that accepts the propagate ( $P_{L C U}$ ) and generate ( $G_{L C U}$ ) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

References

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de:Paralleladdierer_mit_Übertragsvorausberechnung

↑ http://www.seas.upenn.edu/~ese171/lab/CarryLookAhead/CarryLookAheadF01.html

[1] ttp://www.seas.upenn.edu/~ese171/lab/CarryLookAhead/CarryLookAheadF01.html

[1]

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+A '''lookahead carry unit''' ('''LCU''') is a logical unit in [[digital circuit]] design used to decrease calculation time in [[adder (electronics)|adder]] units and used in conjunction with [[carry look-ahead adder]]s (CLAs).
+==4-bit adder==
+A single 4-bit CLA is shown below:
+[[File:4-bit carry lookahead adder.svg|none|framed|4-bit adder with Carry Look Ahead (CLA)]]
+==16-bit adder==
+By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.
+The LCU accepts the group propagate (<math>P_G</math>) and group generate (<math>G_G</math>) from each of the four CLAs. <math>P_G</math> and <math>G_G</math> have the following expressions for each CLA adder:<ref>http://www.seas.upenn.edu/~ese171/lab/CarryLookAhead/CarryLookAheadF01.html</ref>
+:<math>P_G = P_3 \cdot P_2 \cdot P_1 \cdot P_0</math>
+:<math>G_G = G_3 + P_3 \cdot G_2 + P_3 \cdot P_2 \cdot G_1 + P_3 \cdot P_2 \cdot P_1 \cdot G_0</math>
+The LCU then generates the carry input for each CLA.
+Assume that <math>P_i</math> is <math>P_G</math> and <math>G_i</math> is <math>G_G</math> from the i<sup>th</sup> CLA then the output carry bits are
+:<math>C_{4} = G_0 + P_0 \cdot C_0</math>
+:<math>C_{8} = G_{4} + P_{4} \cdot C_{4}</math>
+:<math>C_{12} = G_{8} + P_{8} \cdot C_{8}</math>
+:<math>C_{16} = G_{12} + P_{12} \cdot C_{12}</math>
+Substituting <math>C_{4}</math> into <math>C_{8}</math>, then <math>C_{8}</math> into <math>C_{12}</math>, then <math>C_{12}</math> into <math>C_{16}</math> yields the expanded equations:
+:<math>C_{4} = G_0 + P_0 \cdot C_0</math>
+:<math>C_{8} = G_4 + G_0 \cdot P_4 + C_0 \cdot P_0 \cdot P_4</math>
+:<math>C_{12} = G_8 + G_4 \cdot P_8 + G_0 \cdot P_4 \cdot P_8 + C_0 \cdot P_0 \cdot P_4 \cdot P_8</math>
+:<math>C_{16} = G_{12} + G_8 \cdot P_{12} + G_4 \cdot P_8 \cdot P_{12} + G_0 \cdot P_4 \cdot P_8 \cdot P_{12} + C_0 \cdot P_0 \cdot P_4 \cdot P_8 \cdot P_{12}</math>
+<math>C_{4}</math> corresponds to the carry input into the second CLA; <math>C_{8}</math> to the third CLA; <math>C_{12}</math> to the fourth CLA; and <math>C_{16}</math> to overflow carry bit.
+In addition, the LCU can calculate its own propagate and generate:
+:<math>P_{LCU} = P_0 \cdot P_4 \cdot P_8 \cdot P_{12}</math>
+:<math>G_{LCU} =  G_{12} + G_8 \cdot P_{12} + G_4 \cdot P_8 \cdot P_{12} + G_0 \cdot P_4 \cdot P_8 \cdot P_{12} + C_0 \cdot P_0 \cdot P_4 \cdot P_8 \cdot P_{12} = C_{16}</math>
+[[File:16-bit lookahead carry unit.svg|none|frame|16-bit adder with LCU]]
+==64-bit adder==
+By combining 4 CLAs and an LCU together creates a 16-bit adder.
+Four of these units can be combined to form a 64-bit adder.
+An additional (second-level) LCU is needed that accepts the propagate (<math>P_{LCU}</math>) and generate (<math>G_{LCU}</math>) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.
+[[File:64-bit lookahead carry unit.svg|none|frame|64-bit adders with a second-level LCU]]
+==References==
+{{Reflist}}
+* {{cite book |last=Katz |first=Randy |authorlink=Randy Katz |title=Contemporary Logic Design |publisher=The Benjamin/Cummings Publishing Company |year=1994 |isbn=0-8053-2703-7 |pages=249–256}}
+* {{cite book |last=Vahid | first=Frank |title=Digital Design |publisher=John Wiley and Sons Publishers |year=2006 |isbn=0-470-04437-3 |pages=296–316}}
+[[Category:Digital circuits]]
+[[Category:Adders]]
+[[de:Paralleladdierer_mit_Übertragsvorausberechnung]]

Metzler matrix: Difference between revisions

Latest revision as of 19:01, 10 November 2013

Contents

4-bit adder

16-bit adder

64-bit adder

References

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Metzler matrix: Difference between revisions

Latest revision as of 19:01, 10 November 2013

4-bit adder

16-bit adder

64-bit adder

References

Navigation menu

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