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The '''subthreshold slope'''  is a feature of a [[MOSFET]]'s  [[current–voltage characteristic]].

In the [[Subthreshold conduction|subthreshold]] region the [[Drain_(transistor)#Terminals|drain]] current behaviour  –  though being controlled by the [[Gate_(transistor)#Terminals|gate]] terminal – is similar to the exponentially increasing current of a [[Diode#Current.E2.80.93voltage_characteristic|forward biased diode]].  Therefore a plot of [[logarithm]]ic drain current versus gate voltage with drain, [[Source_(transistor)#Terminals|source]], and [[Bulk_(transistor)#Terminals|bulk]] voltages fixed will exhibit approximately linear behaviour in this MOSFET operating regime. Its slope is the subthreshold slope.

The subthreshold slope is closely related to its [[Reciprocal (mathematics)|reciprocal value]] called  '''subthreshold swing'''&nbsp;''S<sub>s-th</sub>'' which is usually given as:<ref>''Physics of Semiconductor Devices'', S. M. Sze. New York: Wiley, 3rd ed., with Kwok K. Ng, 2007, chapter 6.2.4, p.&nbsp;315, ISBN 978-0-471-14323-9.</ref>

<math>   S_{s-th} = ln(10) {kT \over q}(1+{C_d \over C_{ox}})   </math>

<math>C_d</math> = [[Depletion region|depletion layer]] capacitance

<math>C_{ox}</math> = gate-oxide capacitance

<math>{kT \over q}</math> = [[thermal energy]] divided by the [[elementary charge]]

The minimum subthreshold swing of a conventional device can be found by letting <math>\textstyle    {C_{ox}} \rightarrow \infty   </math> which yields 60 mV/dec at room temperature (300 K). A typical experimental subthreshold swing for a scaled MOSFET at room temperature is ~70 mV/dec, slightly degraded due to short-channel MOSFET parasitics.<ref name="Intel22">{{Cite doi|10.1109/VLSIT.2012.6242496}}</ref>

A ''dec'' (decade) corresponds to a 10 times increase of the drain current ''I<sub>D</sub>''.

A device characterized by steep subthreshold slope exhibits a faster transition between off (low current) and on (high current) states.

==References==
{{reflist}}

==External links==
* [http://www.iue.tuwien.ac.at/phd/stockinger/node13.html Optimization of Ultra-Low-Power CMOS Transistors]; Michael Stockinger, 2000

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[[Category:Transistor modeling]]